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Faculties Details

Rajendrakumar D Patel

Designation

Associate Professor, HOD

Department

Electronics & Communication Engineering

Email Id

rajendrakumar.patel@marwadieducation.edu.in

Educational Qualification

PhD (NIT, Bhopal), M.Tech (NIT, Bhopal),
B.E. (Bhavnagar University)

DOB

26 October 1979

Work Experience

16 Years

Area of Interest/ Specializations

Micro-Architecture Design & Exploration, Reconfigurable computing, Embedded Systems

Subjects teaching at U.G. Level

Digital Electronics, Microprocessor 8085 and 8086, Microcontroller 8051 and AVR, Digital Signal Processing.

Subjects teaching at P.G. Level

VLSI-CAD, VLSI Signal Processing, HDL Based Digital System Design.

Research Guidance MASTER

8

Research Guidance Ph.D

-----

Projects carried out

1 (Ongoing) Research Project from SAC (ISRO), Ahmedabad

Patents

-

Achievements

• Reviewed research papers for Journal of Systems Architecture (JSA), ELSEVIER.
• Guided students of 3rd Semester ECE and CE to participate in National level SMART CITY RAJKOT HACKATHON 2017. Participated team has proposed solution for the requirement of the municipal corporation to digitize their map of Manholes for Drainage Lines. The team has been awarded with consolation prize.

Awards

• Awarded with Certificate of Merit for successfully completing Task Based Training, with Class-A, conducted by IIT Bombay as a part of e-Yantra Lab Setup Initiative (eLSI).
• Awarded with Elite Certificate for successfully completing course on Embedded System Design with consolidated score of 75%. The course was conducted by Prof. Anupam Basu, Chairman and Head, Center for Continuing Education, IIT Kharagpur in partnership with NASSCOM.

Book published

-

No. of paper published in national conferences

1

No. of paper published in international conferences

6

No. of paper published in national journals

No. of paper published in international journals

8

Professional membership

IEEE, IET, ISTE

Research publications

1. Rajendra Patel, Arvind Rajawat, “Instruction Cache Design Space Exploration for Embedded Software Applications”, in Proceedings of 19th International Symposium on VLSI Design and Test (VDAT2015), Nirma University, June 26-29, 2015
2. Rajendra Patel, Arvind Rajawat, “Dominant Block Guided Optimal Cache Size Estimation to Maximize IPC of Embedded Software”, International Journal of Embedded Systems and Applications (IJESA), Vol. 3, Issue 3, pp. 35-44, September 2013
3. Mahendra Vucha, Rajendra Patel, Arvind Rajawat, “Dynamic Profiling Methodology for Resource Optimization in Heterogeneous Computing System”, in Proceedings of International Conference on Emerging Research in Computing, Information, Communication and Applications (ERCICA-13), ELSEVIER, pp. 243-248, August 2013
4. Rajendra Patel, Arvind Rajawat, “Recent Trends in Embedded System Software Performance Estimation”, Journal of Design Automation for Embedded System, Springer, Vol. 17, pp. 193-213, December 2013
5. Rajendra Patel, Arvind Rajawat, “A Survey of Embedded Software Profiling Methodologies”, International Journal of Embedded Systems and Applications (IJESA) Vol.1, No.2, pp. 19-40, 2011
6. Rajendra Patel, Arvind Rajawat, R. N. Yadav, “Remote Access of Peripherals using Web Server on FPGA Platform”, in International Conference on Recent Trends in Information, Telecommunication and Computing, IEEE, pp. 274-276, 2010
7. Ashish Chauhan, Rajendra Patel, Arvind Rajawat, “Reconfiguration of FPGA for Domain Specific Applications using Embedded System Approach”, in International Conference on Signal Processing System, IEEE, pp. 438-442, 2009
8. Rajendra Patel, Shilpi Banerjee, “VHDL Implementation of High Performance, Self Timed, Floating Point Processor”, in International Conference on Emerging Technologies and Applications in Engineering, Technology and Sciences, 2008
9. Shaktisinh Jadeja, Jayesh Popat, Rajendra Patel, “Power Reduction Techniques used in Testing of VLSI Circuits”, in Proceedings of 12th IEEE India International Conference, INDICON 2015, pp. 1-4, December 2015, doi: 10.1109/INDICON.2015.7443367
10. S. Jadeja, J. Popat and R. Patel, “A Review on Low Power Testing Techniques.” NCETIET-2014, National conference on Emerging Trends in Information and Communication Technology Proceedings, (ISSN 0975-0282), pp. 72-74, November-2014.
11. Kardam Kaushal Komalprasad, Vivek Ramamoorthy, Rajendra Patel, “Review on Design of Planar Antennas for Satellite Communication Application”, International Journal of Scientific Research & Development, ISSN:2321-0613, vol.3, Issue 01, pp.598-601, April-2015. (IF – 2.39), (Indexed by – Academia, Google Scholar, Scribd, Research Gate, etc.)
12. Kavar Nilesh, Amitkumar, Rajendra Patel, “A Review on Two-Stage CMOS Operational Amplifier Using Frequency Compensation Techniques”, International Journal of Advance Engineering and Research Development, ISSN:2348-6406, Vol.2, Issue 3, March-2015. (IF – 3.14),
13. Ruby Yadav, Rajender Patel, Sunil Lavadiya, “Enhancing the Energy Parameter of Leach Protocol For Wireless Sensor Network” in International Journal of Engineering Research and Development, Vol. 11, Issue 02, pp.58-61, e-ISSN: 2278-067X, p-ISSN: 2278-800X, February 2015.
14. Hina Asari, Rajendra Patel, Hitesh Ghadiya, “A Survey of Different Approaches for Differentiating Bit Error and Congestion Error”, International journal of Engineering Research and Development, p-ISSN: 2278-800X, vol.10, Issue 12, pp.67-71, December-2014.
15. Maulikkumar U Vadodariya, Rajendra Patel, Jayesh Popat, “A Review On Operational Transconductance Amplifier (OTA) Using 180nm Technology”, International Journal of Advance Engineering and Research Development, ISSN: 2348-6406, Vol. 1, Issue 11, pp.215-219, December -2014

Technology transfers

-

Workshop

13

Strength

Life-long learner, High level of commitment to work, Good managerial capabilities

Weakness

Feel uncomforting until completion of work